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Joined 11 months ago
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Cake day: October 25th, 2023

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  • Talk about burying the lede in the last segment. Asus isn’t using the official connector and every other vendor thinks their connector is risky and probably defective. That’s not on nvidia, other than allowing it (and this is the reason why they ride partners’ asses sometimes on approval/etc).

    The rest of the stuff is Igor still grinding the same old axe (pretty sure astron knows how to make a connector, if the connector is so delicate it would be broken by GN’s physical testing, etc) but if asus isn’t using the official connector and they’re disproportionately making up a huge number of the failures, that’s really an asus problem.





  • GA102 to AD102 increased by about 80%, but the jump from Ad102 to GB202 is only slightly above 30%,

    Maybe GB202 is not the top chip, and the top chip is named GB200.

    I mean, you’d expect this die to be called GB102 based on the recent numbering scheme, right? Why jump to 202 right out of the gate? They haven’t done that in the past, AD100 is the compute die and AD102, 103, 104… are the gaming dies. In fact this has been extremely consistent all the way back to Pascal, even when there is a compute uarch variant that is different (and, GP100 is quite different from GP102 etc) it’s still called the 100.

    But if there is another die above it, you’d call it GB100 (like Maxwell GM200, or Fermi GF100). Which is obviously already taken, GB100 is the compute die. So you bump the whole numbering series to 200, meaning the top gaming die is GB200.

    There is also precedent for calling the biggest gaming die the x110, like GK110 or the Fermi GF110 (in the 500 series). But they haven’t done that in a long time, since Kepler. Probably because it ruins the “bigger number = smaller die” rule of thumb.

    Of course it’s possible the 512b rumor was bullshit, or this one is bullshit. But it’s certainly an odd flavor of bullshit - if you were making something up, wouldn’t you make up something that made sense? Odd details like that potentially lend it credibility, because you’d call it GB102 if you were making it up. It will also be easy to corroborate across future rumors, if nobody ever mentions GB200-series chips again, then this was probably just bullshit, and vice versa. Just like Angstronomics and the RDNA3 leak, once he’d nailed the first product the N32/N33 information was highly credible.


  • Sure, but so could AMD, but considering this is Nvidia’s core business, they have a ton more money and engineers and are far more desirable to work for, it’s probably less likely Nvidia will have issues and more likely AMD will.

    it is also worth mentioning that NVIDIA is probably #2 in chiplets behind AMD. They weren’t too far behind AMD’s first attempts (GP100 was only like a year behind Fiji) and theirs actually was a commercially successful product. They also have the most successful multi-GPU interconnect and it’s only with some of the recent Infinity Fabric Coherent PCIe Interconnect (not the same as normal infinity fabric) and Infinity Link (again, not the same as infinity fabric) that AMD has been able to address these sorts of products.

    Just because NVIDIA didn’t rush to step on the rake with chiplet designs this generation, doesn’t mean they’re behind. They are looking at it, they just thought it wasn’t ready yet, and really they were right. It’s been a huge albatross around RDNA3’s neck, I genuinely think RDNA3 would have been much better if they had gone monolithic.

    On the other hand, obviously this did work out with Zen: Naples was garbage, Rome was fantastic, and people immediately started theorycrafting about how this meant RDNA4 was perfectly positioned to sweep NVIDIA, how the reticle limit is going to bite NVIDIA, etc. But the difference is, NVIDIA doesn’t have a track-record of needing multiple gens to get a decent product: GP100 was much better than Fury X or Vega without needing a naples or RDNA3-level rake-in-the-face gen. When the time is right, when it makes sense as a product, you will see them move to chiplets on consumer cards and they will probably put out a successful first generation. There’s no reason to think even the reticle-limit thing is some insurmountable cliff for them, once the reticle limit drops, they will start launching chiplet designs and it will probably be just fine.

    There’s a lot of reasons for that, not only do they have more people but they pay top dollar and generally they’re the cream of the crop. AMD and Intel are both notorious for underpaying employees and then the good ones get poached by NVIDIA and Apple after they’ve finished training.




  • the interesting thing imo is the implications for CoWoS stacking capacity. everyone knows it’s supposed to be ramping, apparently it is enough that they can target sub-$200 x3d chips now.

    AMD also might well see this as a strategic move to tie up that capacity so NVIDIA can’t use it. like even if you make shit margins on the chip itself… you’re denying your competitor the sale of a $100k H100. Meanwhile AMD and several other competitors are racing along on their own offerings and ecosystems.




  • someone was recently telling me that in a previous life qualcomm was consistently the worst company they had to work with and that they quote “never missed a chance to twist the knife”, both financially and also just with routine incompetence.

    this was after the story of qualcomm suicide-bombing their new ARM desktop processors’ launch by bundling a high-power high-performance SOC with phone-tier power ICs that required ganging multiple of them together (since qualcomm didn’t have a proper laptop SOC, but wouldn’t miss the chance to bundle a sale of something) and since they were phone ICs they had high-density bumpout that required a super expensive PCB. Oh and partners couldn’t even just throw away the power ICs because they were DRM’d to the processor… even apple doesn’t do that lol.

    https://semiaccurate.com/2023/09/26/whats-going-on-with-qualcomms-oryon-soc/






  • Launching the 5600x3d was always about controlling the price of 5800x3d. AMD did the same thing with the GRE series - the 7900 GRE was launched to halt the slide of 7900XT prices. And now that too has a bunch of volume after all.

    I said that when it was originally launched and people got real upset but there was never a stream of defective 6c dies to begin with, stacking happens after binning so they know it’s defective or not, and failures during stacking isn’t really a real thing that leaves you with any amount of functional cores. But people leaned on the microcenter dude saying it was a yield sku.

    Nor is it a failure of clocks etc. AMD doesn’t have any 6c zen3d epyc SKUs. They do have 2c and 4c stacks but they only made 6c stacks for the 5600x3d in the first pla - it was literally manufactured from scratch for the 5600x3d.

    People are dumb and put way too much faith in marketing statements.