RISC-V

riscv@programming.dev

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cm0002@midwest.social · 2 months ago

Alibaba's TSMC-Built 5nm RISC-V Chip, XuanTie C950, Now Runs Qwen-3.8 27B Model Natively, Unlocking Massive Vertical Integration Tailwinds

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Alibaba's TSMC-Built 5nm RISC-V Chip, XuanTie C950, Now Runs Qwen-3.8 27B Model Natively, Unlocking Massive Vertical Integration Tailwinds

cm0002@midwest.social · 2 months ago

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cm0002@infosec.pub · 2 months ago

GCC 17 Now Supports Using -mtune=native -mcpu=native On RISC-V

www.phoronix.com

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GCC 17 Now Supports Using -mtune=native -mcpu=native On RISC-V

www.phoronix.com

cm0002@infosec.pub · 2 months ago

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ludrol@programming.dev · 3 months ago

A Third World Embedded Engineer Responds to "RISC-V: They Should Have Known Better"

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cross-posted to:
riscv@programming.dev

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A Third World Embedded Engineer Responds to "RISC-V: They Should Have Known Better"

ludrol@programming.dev · 3 months ago

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cross-posted to:
riscv@programming.dev

ludrol@programming.devEnglish · 3 months ago

RISC-V: They Should Have Known Better - Dmitry.GR

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RISC-V: They Should Have Known Better - Dmitry.GR

ludrol@programming.devEnglish · 3 months ago

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cm0002@lemy.lol · 3 months ago

PoCL 7.2-RC1 Brings Official OpenCL 3.0 Conformance On RISC-V & x86_64 CPUs

www.phoronix.com

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PoCL 7.2-RC1 Brings Official OpenCL 3.0 Conformance On RISC-V & x86_64 CPUs

www.phoronix.com

cm0002@lemy.lol · 3 months ago

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cm0002@lemdro.idMEnglish · 3 months ago

Pushing the limits of RISC-V emulation

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Pushing the limits of RISC-V emulation

cm0002@lemdro.idMEnglish · 3 months ago

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cm0002@infosec.pub · 3 months ago

NetBSD 11.0 Released With RISC-V Support, Enhanced Linux System Call Compatibility

www.phoronix.com

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NetBSD 11.0 Released With RISC-V Support, Enhanced Linux System Call Compatibility

www.phoronix.com

cm0002@infosec.pub · 3 months ago

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cm0002@lemy.lol · 3 months ago

NetBSD 11.0 Brings RISC-V Support, Linux Compatibility Improvements

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NetBSD 11.0 Brings RISC-V Support, Linux Compatibility Improvements

cm0002@lemy.lol · 3 months ago

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cm0002@lemy.lol · 3 months ago

GNU Binutils 2.47 Released with New RISC-V Improvements

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GNU Binutils 2.47 Released with New RISC-V Improvements

cm0002@lemy.lol · 3 months ago

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cm0002@lemy.lol · 3 months ago

Conflict to Compliance: RISC-V Extension Migration Across Spec, HW, and SW

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Conflict to Compliance: RISC-V Extension Migration Across Spec, HW, and SW

cm0002@lemy.lol · 3 months ago

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cm0002@lemy.lol · 3 months ago

GNU Binutils 2.47 Released With More RISC-V Extensions, New Options

www.phoronix.com

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GNU Binutils 2.47 Released With More RISC-V Extensions, New Options

www.phoronix.com

cm0002@lemy.lol · 3 months ago

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cm0002@lemy.lol · 4 months ago

HFI BIOS Aims To Provide A POST-Like Power On Screen & BIOS Setup Utility For RISC-V

www.phoronix.com

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HFI BIOS Aims To Provide A POST-Like Power On Screen & BIOS Setup Utility For RISC-V

www.phoronix.com

cm0002@lemy.lol · 4 months ago

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cm0002@lemy.lol · 4 months ago

Linux 7.2 Enabling UltraRISC RISC-V Support In The Default Kernel Build

www.phoronix.com

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Linux 7.2 Enabling UltraRISC RISC-V Support In The Default Kernel Build

www.phoronix.com

cm0002@lemy.lol · 4 months ago

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cm0002@libretechni.caEnglish · 4 months ago

RISCBoy: Portable games console, designed from scratch: CPU, graphics, PCB, and the kitchen sink

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RISCBoy: Portable games console, designed from scratch: CPU, graphics, PCB, and the kitchen sink

cm0002@libretechni.caEnglish · 4 months ago

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cm0002@lemy.lol · 4 months ago

Modder builds 8,192-core GPU at home out of RISC-V microcontrollers — full "graphics card" draws over 2,000 watts of power, requires a 3D printer to program

www.tomshardware.com

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Modder builds 8,192-core GPU at home out of RISC-V microcontrollers — full "graphics card" draws over 2,000 watts of power, requires a 3D printer to program

www.tomshardware.com

cm0002@lemy.lol · 4 months ago

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cm0002@lemy.lol · 4 months ago

Linux 7.2-rc2 Raising The Default RISC-V 64-bit CPU Limit To 256 Cores

www.phoronix.com

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Linux 7.2-rc2 Raising The Default RISC-V 64-bit CPU Limit To 256 Cores

www.phoronix.com

cm0002@lemy.lol · 4 months ago

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cm0002@lemy.lol · 4 months ago

RISC-V RVV Vector Performance Benchmarks With The SpacemiT K3 SoC

www.phoronix.com

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RISC-V RVV Vector Performance Benchmarks With The SpacemiT K3 SoC

www.phoronix.com

cm0002@lemy.lol · 4 months ago

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cm0002@lemy.lol · 4 months ago

QSOE 0.1 Debuts as a QNX-Inspired Open-Source OS for RISC-V

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QSOE 0.1 Debuts as a QNX-Inspired Open-Source OS for RISC-V

cm0002@lemy.lol · 4 months ago

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cm0002@lemy.lol · 4 months ago

Linux 7.2 RISC-V Reduces Kernel Startup Overhead, Eswin SoC Support By Default

www.phoronix.com

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Linux 7.2 RISC-V Reduces Kernel Startup Overhead, Eswin SoC Support By Default

www.phoronix.com

cm0002@lemy.lol · 4 months ago

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RISC-V@programming.dev

riscv@programming.dev

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RISC-V (pronounced “risk-five”) is a license-free, modular, extensible instruction set architecture (ISA).

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