imaginary_num6er@alien.topB to Hardware@hardware.watchEnglish · 10 months agoRapidus to Develop 1nm Process Technology With Leti and the University of Tokyowww.tomshardware.comexternal-linkmessage-square5fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkRapidus to Develop 1nm Process Technology With Leti and the University of Tokyowww.tomshardware.comimaginary_num6er@alien.topB to Hardware@hardware.watchEnglish · 10 months agomessage-square5fedilink
minus-squareQuatro_Leches@alien.topBlinkfedilinkEnglisharrow-up1·10 months agoWhat does the nm mean here tho? Diameter of a silicon atom is about 0…25 nm
minus-squareResponsibleJudge3172@alien.topBlinkfedilinkEnglisharrow-up1·10 months agoIt means density of transistors per square mm in relation to TSMC N3 (‘3nm’) and N2 (‘2nm’
minus-squareAnimeAlt44@alien.topBlinkfedilinkEnglisharrow-up1·10 months agoAt this point it just refers to ‘next generations after 2nm’. Not only does the process obviously not exist, they haven’t decided on what transistor structure to use either whether GAAFET or a successor.
What does the nm mean here tho? Diameter of a silicon atom is about 0…25 nm
It means density of transistors per square mm in relation to TSMC N3 (‘3nm’) and N2 (‘2nm’
At this point it just refers to ‘next generations after 2nm’. Not only does the process obviously not exist, they haven’t decided on what transistor structure to use either whether GAAFET or a successor.